From January 29, 2019 to January 31, 2019 Department of Computer Engineering hosted a three day workshop entitled "A practical overview of High Level Synthesis using Xilinx Vivado and ZedBoard" at KFUEIT. The workshop was part of the courses Advance Digital System Design and System on Chip Design for MS Computer Engineering students. Resource person, Engr. Abdul Basit, has extensive experience in Hardware Design, FPGAs and System on Chips.
The purpose of the workshop was to give a hands on practise of HLS using Vivado and Zedboard to participants. The outline of the three sessions is listed below:-
- Introduction to High Level Synthesis and Xilinx Vivado
- IP Creation using Vivado HLS and Vivado HLX Editions
- Mapping approaches and tools for heterogeneous FPGAs
- Support of hard IP blocks such as embedded processors and memory interfaces
- Create a custom peripheral and add it to the system
- Methods for leveraging (partial) dynamic reconfiguration to increase performance, flexibility reliability, or programmability
- Software Debugging Using SDK
- Write a software application to access peripherals
- Perform IP-level Bus Functional simulation verification
- Experience a basic design flow of Vivado HLS and review generated output.
- FPGA virtualization (design for portability, resource sharing, hardware abstraction)
